ENIAC World Wide Web
During the course of design and construction of the ENIAC it was necessary to freeze its engineering design very early in order to meet the urgent need for an operational computer. However, as the construction proceeded it became increasingly obvious that it was both possible and desirable to design a computer which would be much smaller in size than the ENIAC and yet have greater flexibility and better mathematical performance. This conclusion was reached as a result of consideration of the computing speed possible with electronic design, the operating characteristics of the circuit elements required in electronic computers, and the nature of the mathematical problems which can be solved economically only by large scale, high-speed computers. The Ballistic Research Laboratory at Aberdeen Proving Ground, MD, became interested in this possibility and in late 1944 it was agreed that, as work on the ENIAC permitted, the design and construction of such a machine should be undertaken by the Moore School of Electrical Engineering under the sponsorship of the Office, Chief of Ordnance, U.S. Army.
The problem of computer design had attracted the attention of one of the world's leading mathematicians, Dr. John von Neumann, who was the author of a report published on 30 June 1945 by the Moore School of Electrical Engineering, University of Pennsylvania. This report, prepared under the Ordnance Department contract for ENIAC, contained a specific proposal for the design of "a very high-speed automatic digital computing system, and in particular with its logical control".
(Quote from Dr. von Neumann's report entitled, "First Draft of a Report on the EDVAC.")
Dr. von Neumann defined an automatic computing system as "a device which can carry out instructions to perform calculations of a considerable order of complexity." He then stated that instructions governing this operation must be given to the device in absolutely exhaustive detail; that instructions must be given in some form the device can sense; and that once these instructions are given to the device it must be able to carry them out completely and without any need for further intelligent human intervention.
In analyzing the contemplated device Dr. von Neumann made five distinctions:
1. Since the device is primarily a computer it will have to perform the elementary operations of arithmetic most frequently. Therefore, it should contain specialized organs for just these operations, i.e., addition, subtraction, multiplication, and division.
2. The logical control of the device (i.e., proper sequencing of its operations) can best be carried out by a central control organ.
3. A device which is to carry out long and complicated sequences of operation must have a considerable memory capacity.
4. The device must have organs to transfer information from the outside recording medium of the device into the central arithmetic part and central control part, and the memory. These organs form its input.
5. The device must have organs to transfer information from the central arithmetic part and central control part, and the memory into the outside recording medium. These organs form its output.
The group at the University of Pennsylvania was reconstituted to include Dr. John von Neumann, Dr. A. W. Burks, and Captain H. Goldstine, as well as Mr. J. Eckert, and Dr. J. Mauchly. Their efforts eventually resulted in the design and construction of a computer along the lines suggested by Dr. von Neumann. A progress report on this machine was published by the Moore School of Electrical Engineering in September 1945. It covered a number of possible physical designs, all of which would meet the general logical requirements. This was followed early in 1946 by a conference attended by Dean Harold Pender and Dr. Irven Travis of the Moore School, Colonel Paul Gillon of OCO, and Dr. John von Neumann of the Institute for Advanced Study. It was decided at this conference that experience with a pilot model of the new calculator was urgently needed in order to obtain information about coding problems and operating characteristics, which could then be applied to the design of a very comprehensive calculating machine. It therefore seemed expedient that the Moore School of Electrical Engineering, University of Pennsylvania, should immediately proceed with the design and construction of a small preliminary model for the Ballistic Research Laboratory, while the Institute for Advanced Study, Princeton, should undertake a study program leading to the establishment of design requirements for a large-scale comprehensive computer.
On 12 April 1946 Contract W-36-034-ORD-7593 was signed between the Ordnance Department and the Trustees of the University of Pennsylvania to prepare a preliminary model of the machine. The original amount of money allotted was $100,000.00 and the final cost, after fifteen supplements to the basic contract, was $467,000.00. The basic contract stipulated that, "the Contractor shall, as an independent Contractor and not as an agent of the Government, design and develop a preliminary model of a small Electronic Discrete Variable Automatic Calculator
(The word calculator was used in the contract although the word computer is more generally used.)(hereinafter referred to as "EDVAC") that will demonstrate the feasibility of producing subsequently an EDVAC having comprehensive properties envisioned in the report entitled "Automatic High-Speed Computing, University of Pennsylvania," prepared by the Contractor under its contract No. W-670-ORD-4926, and shall construct and deliver to the Government f.o.b., Philadelphia, PA, on or before 30 June 1947, one (1) preliminary model of said EDVAC.
In working out the preliminary designs for this small EDVAC, Moore School personnel worked in close cooperation with representatives of the Ballistic Research Laboratory who were then operating the ENIAC. Both the Moore School and BRL personnel very naturally desired this small EDVAC to be as comprehensive as possible and still meet the requirements for small size and simplicity. In order to obtain a mutually agreeable interpretation of the term "Small Preliminary Model of EDVAC," a conference was held at Aberdeen Proving Ground on 9 October 1946, attended by Dean Pender and Dr. Travis of the Moore School, Colonel G. F. Powell, and Mr. S. Feltman of OCO, Colonel L. E. Simon of BRL, Dr. von Neumann of IAS, Mr. H. Diamond of the National Bureau of Standards, and other representatives of these activities.
The Moore School of Electrical Engineering presented three possible designs, briefly described as follows:
EDVAC I. A very simple binary computer, with automatic addition, subtraction, and multiplication, programmed division, and no internal checking. Memory capacity of 1,000 words.
EDVAC II. A simple binary coded decimal computer, with fixed decimal point, all four basic arithmetic processes automatic, and automatic checking in the computer. Memory capacity of 1,000 words.
EDVAC III. A more comprehensive machine, with automatic floating decimal point, and all the automatic features listed under EDVAC II. Memory capacity of 4,000 words.
It was decided in this conference that a binary machine based on the EDVAC I design, but with automatic division and automatic checking, was desirable.
(A binary machine is one that uses the binary system of notation. This system employs only two digits, 0 and 1, in contrast to the decimal system which employs ten digits, 0, 1, 2, 3, 4, 5, 6, 7, 8, and 9. The binary system is useful in automatic computers not only because of the two-state system of an electronic device (i.e., current on or off), but also because the circuits required to do arithmetic are not too difficult to design and react rapidly, hence arithmetic operations can be performed at high rates. Counting in the binary system is done by twos instead of by tens as in the decimal system. For example the binary number 1011 signifies: 1 eight, plus 0 fours, plus 1 two, plus 1 one which is eleven and expressed as 11 in the decimal system.)This machine was designated as the EDVAC 1.5. It was also decided that the National Bureau of Standards would design and supply the equipment for preparing and printing from the magnetic wire used in the Reader-Recorder of the EDVAC.
As the design of the EDVAC 1.5 progressed, further discussions with BRL representatives indicated the desirability of introducing certain additional orders, such as the "Extract" order, into the coding scheme. Since these changes, together with another change necessary to give increased stability of the memory, would have considerably increased the complexity of the EDVAC, another conference was held at Aberdeen Proving Ground on 27 May 1947, in which two alternative proposals were considered. These were EDVAC 1.5A and EDVAC 1.5B, with and without the added coding flexibility respectively. No final decision was reached at this conference, and Dr. R. F. Clippinger of the Ballistic Research Laboratory at APG was appointed to consider the various possibilities and submit a report. As a result of this report the EDVAC 1.5B design was approved with minor modification.
The major features of this computer were the use of the binary system of numeration, the serial arithmetic mode, the four-address command structure, and duplicate circuitry for check purposes. This computer dropped the use of the train of pulses to represent decimal digits in favor of the binary system, which was much better suited to the two-stateness of the electronic circuits. The design features of EDVAC served as a model for many later computers.
EDVAC was the first internally stored program computer to be built, a major improvement over the ENIAC. One of the major disadvantages of the ENIAC had been the fact that it required considerable human effort to change to different programs. ENIAC was programmed by setting switches on function tables and by changing the wiring (wired programs).
The EDVAC was to be organized essentially as follows:
1. Reader-Recorder. This unit would contain the three wire drives, associated servo-mechanisms, amplifiers for the magnetic reading, recording and erasing heads, and the equipment required to transfer information from the heads to the processing delay and vice versa.
2. Control. This unit would contain all operating buttons, indicating lamps, control switches, and an oscilloscope for aid in maintenance. The control sends special orders, set up on switches, to the dispatcher in order to start the machine, and may send words, set up on another set of switches, to the high-speed memory.
(The Reader-Recorder and the control are the only units containing devices to be manipulated by the operator.)
3. Dispatcher. This unit would decode orders received from the control and memory. It would also emit control signals to the other units, which need them to perform their functions. Its electrical delay memory would retain the order while it is being performed.
4. High-Speed Memory. This would consist of two identical units, each containing 64 acoustic delay lines and associated regeneration circuits. Each line or "tank" would have a capacity of 8 words. Each memory cabinet would also house three short tanks of one word capacity, which would be used by the algebraic units. These tanks are used for temporary storage of the operands during arithmetic operations. The cabinets would contain, in addition, apparatus to decode the addresses received from the dispatcher and select the memory position whose contents are to be transferred out of the memory or to be replaced by incoming data.
5. Computer. This unit would perform the rational operations (addition, subtraction, multiplication, and division) on pairs of numbers with signs received from the high-speed memory, and return the result to the memory at the appropriate time. The arithmetic unit would be in duplicate and the answers compared, digit for digit. Any disagreement would stop the machine and give an "abnormal halt" indication.
6. Timer. This would emit clock pulses at intervals of 1 microsecond, and timing pulses at intervals of 48 microseconds.
The National Bureau of Standards undertook to construct an input-output system for the EDVAC. It consisted of modified teletype equipment for inscribing key-boarded information to the magnetic wires, and for outscribing information from the magnetic wires to automatically typewritten characters on rolls of ordinary paper.
After briefly covering the organization of EDVAC, the report then dealt with design problems. These were of utmost importance in order that all requirements could be met.
As mentioned previously, EDVAC was required to be much smaller than the ENIAC and to have greater flexibility and better mathematical performance. It was assumed that its speed would be at least equal to that of the ENIAC. Reliability was an obvious requirement and previous operating experience with various computers indicated the need for emphasis on design to achieve maximum reliability. Also needed was an adequate checking system.
In order to obtain high overall speed in the solution of complex mathematical problems, high functional speed had to be supplemented by an adequately large high-speed memory. In late 1946 a mercury acoustic delay memory had been built by the Moore School of Electrical Engineering. This device had operated stably and reliably for long periods. Although other types of memory gave promise of eventually becoming useful, it did not appear, at that time, that any other type could become available for immediate use. Therefore, the mercury memory was selected for EDVAC.
The next question to be considered was the capacity of the memory. In discussions of possible problems for digital computers, requirements for a high-speed memory of as many as 10,000 words were encountered.
(A "word" is, in computing language, a combination of digits handled as a unit by the machine.)However, many problems could be handled with a memory of 1,000 words or less. It was shown that a mercury acoustic memory of 1,024 words would require nearly the same amount of equipment as the rest of the computer. A reduction in size to 512 words would result in a saving of only 25% in size and cost, and would slow down the solution of many problems. On the other hand, an increase to 2,048 words would increase the size and cost by 50%, while this additional capacity would be required only by a relatively small number of problems. Therefore, a high-speed memory capacity of 1,024 was selected as the best compromise between the mathematical requirement and the requirement that EDVAC should be much smaller than ENIAC.
In the construction of the memory device liquid delay lines were used since this was a straightforward way to avoid interference from transverse waves. Quartz transducers were used because of their stability and low cost and because X-cut quartz crystals were well suited to the production of compressional waves in the liquid. Of a large number of liquids considered, mercury was found to give the best acoustic match with the quartz crystals and for this reason it was used.
There were some disadvantages with mercury, however. It was dense and expensive and it was contaminated by most metals. Contamination in the EDVAC was completely eliminated by the use of glass tubes with tungsten electrodes. Weight and cost were reduced by use of tubes of the smallest diameter consistent with good performance.
The temperature of the mercury tanks was stabilized by enclosing the tanks in heavy extruded U-sections of Dow metal clamped to thick vertical plates of the same material, mounted back to back with heating elements between them. The temperature control system was designed to maintain the temperature well within the desired limits. Thirty-two long tanks were mounted on each plate. The entire assembly was enclosed in a heat insulating case and a pair of coaxial leads was brought out from each tank to its associated recirculating chassis. This chassis was mounted outside the insulating case where it was cooled by circulation of the ventilating air. Two of these assemblies, mounted in separate cabinets, were constructed for the EDVAC.
Some consideration was given to the possibility of using a temperature compensating device with each tank, instead of the system for controlling the temperature of the assembly. This idea was attractive in many ways but would have required considerable development. It would also have had the disadvantage of requiring 128 individual controls, as compared to the two controls required for the two-bank stabilized system which was actually used. In the former case the failure of any one of the 128 controls could incapacitate the system.
As previously indicated, functional operation had to be fast enough to give operational speeds comparable with the ENIAC, in spite of the fact that the serial operation of the EDVAC would be inherently slower than the parallel operation of the ENIAC. An upper limit to the operational speed was set by the pulse repetition frequency. The frequency selected, one megacycle per second, was determined primarily by the characteristics of the commercially available vacuum tubes used in the machine.
In all of the circuit design, emphasis was placed on reliability, simplicity, economy of vacuum tubes, and, to the limited extent practicable, standardization of circuits. Two circuits were built into plug-in units for ease and speed in maintenance. These were the flip-flop and the mercury memory circulating units. Crystal gating circuits were extensively used to decrease the number of tubes required. All available information indicated that the life of the germanium crystals, at the voltages and currents used in the EDVAC, would be many times that of the tubes they replaced.
(Experience with the ENIAC had demonstrated that for long life and reliable operation, tubes should not be operated at average currents or dissipations above half of the values for which they are normally rated.)
Since the field of electronic digital computer design was new as the EDVAC was being developed, it was impossible to set up hard and fast rules of circuit design. Such guiding principles as were established were subject to modification as additional information became available. Nevertheless, certain guiding principles in circuit design were established and adhered to where possible.
A number of methods for checking the algebraic operations were considered, and, taking into account the maintenance problem, it was concluded that the most satisfactory method was to build two identical algebraic units, carry out all algebraic operations in both units simultaneously, and compare results at five points. Other checks were provided in the order type selector and dispatcher for detecting forbidden orders, pulses in switching blanks, and other coding and functional errors.
The problem of driving pulse lines received a great deal of attention. The method used in the ENIAC (driving of lines by means of cathode followers in parallel) was unsuitable for use in the EDVAC because of the large number of tubes required to drive certain heavily loaded lines. Two new methods were devised. The first consisted of blocking oscillators for low duty cycle lines and the second of a power pulse transformer driven by tube banks for high duty cycle lines. These systems would require only about one sixth as many tubes as the earlier circuits.
The use of magnetic wire as input and output medium for the EDVAC was given consideration; however, the scheme never culminated in an operating wire unit.
The EDVAC was housed in steel cabinets 86 inches high. In all except the memory units, the chassis are mounted vertically, with doors front and back for ready access to both sides of each chassis. This arrangement simplified maintenance and was convenient for installation of the ventilating system.
Relatively few manual controls were required, since they were used only for starting and stopping the machine, examining the progress of a calculation, modifying a routine, or checking functional operation.
The input-output system was the result of collaboration between the National Bureau of Standards, the Institute for Advanced Study, and the Moore School of Electrical Engineering. It was designed by the Bureau of Standards and utilized, insofar as possible, standard commercial equipment in its construction, particularly teletype equipment and standard wire recording components.
The system was divided into two parts, the inscriber and the outscriber. The inscriber was used to translate the information prepared by the programmer into a code on the magnetic wire which served as an input for the EDVAC. The outscriber printed the information, which the output of EDVAC had placed on a magnetic wire, on paper for human use.
Two teletype keyboarding machines were used in the inscriber. The first was called the preliminary perforator and was used to prepare a preliminary "chadless" paper tape by typing the programmer's instructions. Chadless tape was used in order that the character might be printed over the perforations to assist in checking. This preliminary tape was fed into a solenoid-operated tape reader, the output of which was fed through the verifier to the perforator-printer, which would retype the same code. The output of this machine would then be fed back to the verifier. If the character agrees with the character on the tape it is punched on the verified tape, and the tape reader advances the preliminary tape to the next character. If the two characters disagree, an indicator lamp lights on the verifier panel and the perforator-printer locks until the source of disagreement is eliminated. Provision was also made to convert from the decimal into the binary notation.
As work under the contract progressed, it became necessary from time to time to freeze logical planning and design characteristics in order that the project should result in the completion of the EDVAC. If this were not done the result would merely have been the establishment of the specifications and techniques then representative of the existing state of the art. Certain design characteristics of the completed machine represented the state of the art two years previous, others of one year previous, while some were current characteristics. As often happens in development projects of this nature, the freezing of design occurred later than had been anticipated, partly because early design decisions had been unsound and partly because it is never possible to prevent research-minded personnel from continuing to incorporate desirable improvements which result in a better instrument but are accompanied by a later completion date. In the case of EDVAC a delay of about one year occurred, but the machine possessed a capability far beyond that envisioned in the preliminary report or in the contract and its supplements.
The EDVAC was constructed at the Moore School of Electrical Engineering and delivered to the BRL Computing Laboratory at Aberdeen Proving Ground in August 1949 for installation. After the installation was completed there were two major engineering jobs to be done before EDVAC could become operational. These were:
1. The memory recirculate amplifiers had to be redesigned to provide additional loop gain.
2. Input-output equipment had to be designed, constructed and installed to provide a means of getting data into and out of the machine.
Although there were very few logical errors in the EDVAC in the initial design, it had more than its share of marginal circuits which had to be modified before it could become operational. These problems were solved in approximately eighteen months and the machine started to operate on a limited basis late in 1951. By early 1952 it was averaging 15-20 hours of useful time per week for solving mathematical problems. By 1961 EDVAC was operating 145 hours out of a 168-hour week.
After the EDVAC was installed at APG there were three major engineering problems to be solved.
The first problem was to redesign the mercury memory amplifier to get better gain bandwidth product and to get better long-term stability.
The second problem was to go through every circuit of the machine to eliminate marginal circuits. Many hours were required to redesign the gating and pulse amplifier circuits.
The third problem was to design an input-output system for the EDVAC. This resulted in the construction of a shift register for assembling asynchronous data from a paper tape reader, which was installed as part of the machine. Controls were installed on other equipment for printing data from the EDVAC onto paper tape and to employ a teletype writer.
Over the past ten years several pieces of new equipment have been added to the EDVAC to increase its flexibility and capabilities to solve problems.
1. The IBM card input-output adapter unit, which was installed in June 1953.
2. A magnetic drum which was installed in the latter part of 1954. It provided an additional 4,608 words of medium-speed storage.
3. A built-in Floating Point Arithmetic Unit, which was added early in 1958. This unit increased the operation speed of EDVAC by a factor of 12 when working with floating point numbers.
4. A magnetic tape system which was added in late 1960 for additional storage.
The application of EDVAC at the Ballistic Research Laboratory is as follows:
1. Exterior ballistics problems such as high altitude, solar and lunar trajectories, computation for the preparation of firing tables, and guidance control data for Ordnance weapons, including free-flight and guided missiles.
2. Interior ballistics problems, including projectile, propellant and launcher behavior, e.g., physical characteristics of solid propellants, equilibrium composition and thermodynamic properties of rocket propellants, computation of detonation waves for reflected shock waves, vibration of gun barrels and the flow of fluids in porous media.
3. Terminal ballistics problems, including nuclear, fragmentation, and penetration effects in such areas as explosion kinetics, shaped charge behavior, ignition, and heat transfer.
4. Ballistic measurement problems, including photogrammetric, ionospheric, and damping of satellite spin calculations, reduction of satellite doppler tracking data, and computation of satellite orbital elements.
5. Weapon systems evaluation problems, including antiaircraft and antimissile evaluation, war game problems, linear programming for solution of Army logistical problems, probabilities of mine detonations, and lethal area and kill probabilities of mine detonations, and lethal area and kill probability studies of missiles.
The following paragraphs present a general description of the way in which EDVAC works. As already mentioned EDVAC is a synchronous automatically- sequenced serial binary electronic digital computer. The word serial refers to the storage device wherein the digits of a stored number become available one at a time.
(In a parallel system all the digits of a number become available simultaneously.)The machine has a high-speed memory of 1,024 words and a medium-speed memory of 4,608 words.
A word, in the strictly electronic part of the EDVAC, consists of a sequence of 44 binary characters or digits followed by 4 blanks. A pulse signifies 1 and the absence of a pulse signifies 0. The pulse positions are spaced at intervals of one microsecond and are about 0.3 microseconds in duration. A complete word thus requires 48 microseconds to pass a given point, and this interval of time is known as a minor cycle.
The high-speed memory consists of mercury delay lines with regenerating amplifiers. The lines are known as long tanks and each tank stores eight words. A long tank is 384 microseconds in time length and this interval is known as a major cycle. Eight minor cycles are required for the contents of a long tank to pass a given point in the circuit. The entire memory consists of 128 long tanks.
In the case of a number the first binary character which emerges will represent the sign (the presence of a pulse denotes "minus"), the next is the least significant digit, and the last is the most significant digit. The characters are arranged so that increasing time corresponds to the direction right to left in written notation. The decimal point in a number is normally interpreted to be at the extreme left, since the multiplication and division operations were designed in such a way as to make this the simplest interpretation.
If the word represents an instruction, the first four digits (in time) determine what the instruction is, that is, whether the operation to be performed is addition, subtraction, multiplication etc., while the remaining forty digits represent four "addresses" in the high-speed memory. Ten binary characters are necessary and sufficient to specify a position in the high- speed memory.
The EDVAC is a 4-address machine and the four addresses are used to specify the locations of the numbers to be operated upon, where to store the results of the operation, and where to find the next instruction in the sequence of operations.
The EDVAC memory system consists of 128 long tanks, 6 short tanks, associated amplifiers and control equipment. The circuits are so arranged that a word may be handled as follows: 1. Read into a given memory position.
2. Allowed to circulate.
3. Withdrawn from a memory and restored by means of an external path.
4. Withdrawn and not restored.
The memory system is divided into two banks, left and right, each containing its own heater and controls. The mercury tank heaters are split into two sections, an upper and a lower section. Each section is controlled by a thermostat to hold the temperature at 50 degree Census plus or minus 1/4 degree Census.
The average operating time per instruction for EDVAC is a follows:
1. Addition 864 microseconds
2. Subtraction 864 microseconds
3. Compare 696 microseconds
4. Extract 696 microseconds
5. Multiply and round off 2,880 microseconds
6. Divide and round off 2,928 microseconds
7. Multiply exact 2,928 microseconds
8. Divide exact 2,928 microseconds
9. Floating point add 960 microseconds
10. Floating point subtract 960 microseconds
11. Floating point multiply 1,248 microseconds
12. Floating point divide 2,352 microseconds
Normal operation of the EDVAC proceeds in the following manner. The operator will take a program deck of IBM cards and load these into the IBM card reader. A special order to read the IBM cards will then be set up on the control switches. Another switch is set to direct the control to read this special order. The initiate button is then depressed, causing the special order to be sent to the dispatchers where it is acted upon and the information on the cards is read into the high-speed memory. The switch is then set to a continuous mode. The machine starts and continues to operate until a programmed halt is reached. Audible and visual signals inform the operator all-well during a run and audible and visual signals are given when the machine ceases computing. The operator then removes the cards which have recorded the results. The cards are placed in a tabulator which prints the results.
An examination of one type of problem solved by EDVAC, the preparation of a firing table, will give some idea of the capability of this computer. The basic problem in the preparation of a firing table is that of computing the trajectory of a projectile by solving a system of differential equations. This system of equations is dependent on the weapon system under consideration, and often, as in the case of a rocket during its powered flight, must be complex enough to account for the fact that the projectile is a rigid body acted on by several forces and moments.
In the past, the equations of motion were solved by numerical integration using a desk calculating machine. For the preparation of a firing table, therefore, a relatively small number of trajectories was computed at finite intervals of some parameters and intermediate values were obtained by interpolation over rather large intervals.
With the advent of the high-speed computers came the possibility of computing as many trajectories as desired and, consequently, of providing firing tables limited in detail only by the desires of the using combat arm or technical service. It is interesting to note that the computation of a trajectory for a conventional artillery projectile was done in the past with a desk calculator in about four hours and that the same computation would require about 30 seconds on either the ENIAC or EDVAC and about 10 seconds on the ORDVAC. Furthermore, and of greater importance, it was now possible to escape the necessity of using many of the approximations that were used in the past. For example, the EDVAC can solve the complex system of equations for a rocket during powered flight in about 3 minutes for each second of flight time. In the past this problem was treated by using some gross approximations which resulted in poor descriptions of the rocket flight.
The introduction of high-speed computers has increased the accuracy and volume of computational capabilities to the level that is required to support the firing table mission, a level that is almost beyond comprehension on the basis of its being done by desk calculators.
EDVAC operates on a 24-hour daily schedule, 7 days per week. A series of tests are run at the start of each 8-hour shift to check the machine and its auxiliary equipment. Approximately 12 hours per week are spent in testing the EDVAC for proper operation and checking out improvements, and the remaining time is used for code checking and problem solving.
The EDVAC operating efficiency has steadily increased over the past several years. The average running time per week during 1960 was 145 hours. Over a period of nine years EDVAC increased its efficiency from 15-20 hours to 145 hours per week. By 1961 it appeared, however, that its operating efficiency had almost reached its maximum.
By the end of 1961 EDVAC was still in operation and was expected to continue operating for at least one year after the BRLESC would begin full operation.
(BRLESC, the first electronic computer fully designed and developed by the BRL, was expected to be operational by late 1961.)After ten years of operation EDVAC was still in use because of its great reliability and productivity, its low operating cost, its high operating efficiency, and its speed and flexibility in solving certain types of problems required by the Ballistic Research Laboratory. (See Appendix II for technical data of EDVAC.)